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PD - 94573
SMPS MOSFET
Applications l High frequency DC-DC converters l UPS and Motor Control Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current l Typical RDS(on) = 12m
l
HEXFET(R) Power MOSFET
IRF8010S IRF8010L
ID
80A 15m
VDSS
100V
RDS(on) max
D2Pak IRF8010S
TO-262 IRF8010L
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM
Max.
80i 57 320 260 1.8 20 16 -55 to + 175
Units
A W W/C V V/ns C
c
PD @TC = 25C Power Dissipation VGS dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and
e
Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter
RJC RJC RCS RJA Junction-to-Case Junction-to-Case (end of life)
Typ.
--- --- 0.50 ---
Max.
0.57 0.80 --- 40
Units
C/W
g
Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mount, steady state)j
Notes
through
are on page 8
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1
01/28/03
IRF8010S/IRF8010L
Static @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
100 --- --- 2.0 --- --- --- --- --- 0.11 12 --- --- --- --- --- --- --- 15 4.0 20 250 200 -200 nA V
Conditions
VGS = 0V, ID = 250A
V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 45A
f
V A
VDS = VGS, ID = 250A VDS = 100V, VGS = 0V VDS = 100V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V
Dynamic @ TJ = 25C (unless otherwise specified)
Parameter
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
82 --- --- --- --- --- --- --- --- --- --- --- --- --- --- 81 22 26 15 130 61 120 3830 480 59 3830 280 530 --- 120 --- --- --- --- --- --- --- --- --- --- --- --- pF ns nC V ID = 80A VDS = 80V VGS = 10V VDD = 50V ID = 80A RG = 39 VGS = 10V VGS = 0V VDS = 25V
Conditions
VDS = 25V, ID = 45A
f f
= 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 80V, = 1.0MHz VGS = 0V, VDS = 0V to 80V
e
Avalanche Characteristics
EAS IAR EAR Parameter Single Pulse Avalanche Energydi Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 310 45 26 Units mJ A mJ
--- --- --- --- --- --- --- --- 99 460
Diode Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ai Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
80 A 320 1.3 150 700 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 80A, VGS = 0V
f
TJ = 150C, IF = 80A, VDD = 50V di/dt = 100A/s
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF8010S/IRF8010L
10000
TOP VGS 15V 12V 10V 6.0V 5.5V 5.0V 4.5V 4.0V
1000
TOP VGS 15V 12V 10V 6.0V 5.5V 5.0V 4.5V 4.0V
ID, Drain-to-Source Current (A)
1000
ID, Drain-to-Source Current (A)
100
BOTTOM
100
BOTTOM
4.0V
10
10
4.0V
1
20s PULSE WIDTH Tj = 25C
0.1 0.1 1 10 100
20s PULSE WIDTH Tj = 175C
1 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.5
I D = 80A
ID, Drain-to-Source Current ()
T J = 175C
RDS(on) , Drain-to-Source On Resistance
3.0
2.5
100
(Normalized)
2.0
10
T J = 25C
1.5
1.0
VDS = 50V 20s PULSE WIDTH
1 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
0.5
V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRF8010S/IRF8010L
100000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd
12
VGS , Gate-to-Source Voltage (V)
ID= 80A VDS= 80V VDS= 50V VDS= 20V
10 8 6 4 2 0
10000
C, Capacitance(pF)
Ciss
1000
Coss
100
Crss
10 1 10 100
0
20
40
60
80
100
VDS, Drain-to-Source Voltage (V)
Q G Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100
TJ = 175 C
10
ID, Drain-to-Source Current (A)
1000
I SD , Reverse Drain Current (A)
100 100sec 10 1msec 1 Tc = 25C Tj = 175C Single Pulse 1 10 10msec
T J= 25 C
1
V GS = 0 V
0.1 0.0 0.5 1.0 1.5 2.0
0.1 100 1000 VDS, Drain-to-Source Voltage (V)
V SD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF8010S/IRF8010L
80
V DS
LIMITED BY PACKAGE
RD
VGS RG 10V
D.U.T.
+
60
-VDD
I D , Drain Current (A)
40
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
(Z thJC ) Thermal Response
1
D = 0.50 P DM t1 t2 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 +T C 1
0.20 0.1 0.10 0.05 0.02 0.01
J = P DM x Z thJC
0.1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF8010S/IRF8010L
15V
600
TOP
ID 18A 32A 45A
VDS
L
DRIVER
500
BOTTOM
EAS , Single Pulse Avalanche Energy (mJ)
400
RG
20V
D.U.T
IAS tp
+ V - DD
A
300
0.01
Fig 12a. Unclamped Inductive Test Circuit
200
100
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting Tj, Junction Temperature (C)
I AS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
50K 12V .2F .3F
10 V
QGS VG QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRF8010S/IRF8010L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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7
S @ 7 H V I A U S 6 Q
@ 9 P 8 A @ U 6 9
! A 2 A A S 6 @
! A F @ @ X
G A @ I DG
T " $ A
G 6 I P DU 6 I S @ U I D
S @ DA DU 8 @ S
P B P G
G 7 H @ T T 6
@ 9 P 8 A U P G
D2Pak Part Marking Information
IRF8010S/IRF8010L
D2Pak Package Outline
C U D X A T " $# A! S DA ' A I@ 69 AP T8 DA TA DU CP UG
! A ! A X X A I P A 9 @ G 7 H @ T T 6
A G A A @ I DG A G 7 H @ T T 6 A @ C U A I D
8
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IRF8010S/IRF8010L
2- COLLECTOR
4- COLLECTOR
3- EMITTER
IGBT
1- GATE
S @ 7 H V I A U S 6 Q
@ 9 P 8 A @ U 6 9
& ( ( A 2 A & A S 6 @
( A F @ @ X
8 A @ I DG
TO-262 Part Marking Information
G 6 I DP U 6 I S @ U DI
S D@ A DU 8 @ S
P B P G
G 7 H @ T T 6
@ 9 P 8 A U P G
TO-262 Package Outline
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G " " G S D A I 6 A DT A DT C U ) @ G Q H 6 Y @
( ' & A @ 9 P 8 A U P G
& ( ( A ( A X X A I P A 9 @ G 7 H @ T T 6
A 8 A A @ I DG A G 7 H @ T T 6 A @ C U A DI
9
IRF8010S/IRF8010L
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% temperature. Starting TJ = 25C, L = 0.31mH, RG = 25, IAS = 45A. VDSS. ISD 45A, di/dt 110A/s, VDD V(BR)DSS, TJ 175C. Calculated continuous current based on maximum Pulse width 300s; duty cycle 2%. allowable junction temperature. Package limitation Rth(jc) (end of life) is the maximum measured value current is 75A. after 1000 temperature cycles from -55 to 150C and When mounted on 1" square PCB ( FR-4 or G-10 is accounted for by the physical wearout of the die attach Material ). For recommended footprint and soldering medium in worse case PCB mounting condition of techniques refer to application note #AN-994. material (solder/substrate), process and re-flow temperature. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
Notes: Repetitive rating; pulse width limited by max. junction
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/03
10
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